A New Method of Designing a Clock Multiplier

This project aims to develop a new method to design clock frequency multipliers. This game-changing technology can overcome the limitations of conventional clock frequency multipliers and can potentially introduce a new paradigm in high-speed circuit design. Such novel technology will position ESS Technology as the leading semiconductor company specializing in the design of future-generation high-speed electronic devices. ESS Technology is currently expanding its R&D activities, and plans to build a strong design team based in Kelowna. The company is keen to recruit multiple talented UBC graduate students as interns to participate the proposed research. These graduate students will potentially be employed full-time by ESS Technology. The creation of these hi-tech jobs will make positive economic impact on the high-tech, particularly the integrated circuit industry, in Western Canada and Okanagan Valley.

Intern: 
Fan Yang & Zhaoquan Zeng & TBD
Superviseur universitaire: 
Dr. Julian Cheng
Project Year: 
2014
Province: 
British Columbia
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