Parallelization of an Industrial Optimization Application

Acculogic develops state-of-the-art testers for short-batch electronic circuit boards (ECBs). The order

in which the required tests are performed affects the amount of shuttle and probe movements required

between the tests, and this affects the overall efficiency of the test procedure. Unique characteristics of

the problem (e.g. the ability to move one set of probes to the next test location while another set of

probes is performing a test) make the problem too large and too complex to be solved with most

traditional combinatorial optimization and heuristic search techniques (e.g. integer programming and

genetic algorithms). Supporting the integration of both artificial intelligence-based and mathematicalbased

optimization techniques, a unique optimization architecture derived from “Asynchronous

Teams” has been developed. A parallel implementation of the new optimization process promises

significant improvements in efficiency and effectiveness, and these advances will be quickly

implemented into Acculogic’s product offerings.

Faculty Supervisor:

Stephen Chen

Student:

Partner:

Acculogic Inc

Discipline:

Computer science

Sector:

Manufacturing

University:

York University

Program:

Accelerate

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Mitacs Partners