Behavioral Model of Charge-Trap Transistors

Conventional von Neumann architectures rely heavily on communication between memory and compute elements,
making them power hungry. In recent years, therefore, neuromorphic computing based on low-power compute-inmemory
devices has been gaining interest. One of the essential aspects of such systems is the hardware modeling
of synapses that are expected to store weights that represent the strength of connections among neurons. Various
devices have been proposed as candidates for analog synapses. In this research, charge-trap transistors (CTTs)
that support the non-volatile analog adjustment of synaptic weights, are investigated. Accurately modeling the
physical phenomena of CTTs is critical to the design of CTT-based neuromorphic systems. A model of the weight
adjustment of CTTs will be developed and verified using experimental data. This model will enable efficient design
of CTT-based synaptic arrays, and the ability to simulate complete neuromorphic systems.

Faculty Supervisor:

Boris Vaisband

Student:

Partner:

Blumind

Discipline:

Engineering

Sector:

Manufacturing; Professional, scientific and technical services

University:

McGill University

Program: