Programmable Transport in Hardware

As network speeds reach hundreds of gigabits per second and beyond, there is increasing interest in using programmable Network Interface Cards (NICs) to improve network performance. A key area of focus is accelerating transport protocols, which significantly impact network performance. Transport protocols are continuously re-designed and updated, especially in large-scale networks, to optimize network performance. However, programming these complex protocols on NICs in an efficient manner is difficult and error-prone, requiring deep knowledge of low-level programming on NIC hardware. This project aims to solve this problem by developing a platform that allows users to write transport protocols in a high-level programming language, without needing to understand the hardware intricacies of NICs. A compiler will translate these protocols into optimized code for the NIC hardware. AMD is a leader in high-performance computing, and with its acquisitions of Xilinx and Pensando, both experienced in programmable NICs, is well-positioned to shape the future of this field. This project will allow AMD’s customers to accelerate transport protocols more easily, reducing the risk of human errors in protocol implementation, potentially avoiding network disruptions and ensuring better performance for millions of users.

Faculty Supervisor:

Mina Tahmasbi Arashloo

Student:

Partner:

AMD Canada

Discipline:

Computer science

Sector:

Manufacturing; Professional, scientific and technical services

University:

University of Waterloo

Program:

Accelerate

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